The Future of Hyperscale: Neoverse Joins NVLink Fusion as SC25 Accelerates Rack-Scale AI Architectures

On November 17 at SC25, Arm and NVIDIA jointly announced that NVIDIA NVLink Fusion is now integrated into the standard Arm Neoverse platform. The move gives Neoverse licensees - including AWS, Google, Microsoft, Oracle, Meta, and a growing cohort of sovereign and national cloud chip teams - a ready-made, coherent, high-bandwidth CPU-to-GPU interconnect that links Arm CPUs directly to NVIDIA GPUs and accelerators.

Both CEOs underscored the significance: NVLink Fusion now delivers “Grace Blackwell-class performance, bandwidth, and efficiency” to any partner building on Neoverse, not just to NVIDIA’s own Grace and Grace-Blackwell CPUs. With this announcement, Neoverse becomes a first-class platform inside the NVLink Fusion ecosystem rather than a special-case Grace implementation.

Rene Haas, CEO of Arm, framed the collaboration thusly:

"Arm and NVIDIA are working together to set a new standard for AI infrastructure, Extending the Arm Neoverse platform with NVIDIA NVLink Fusion brings Grace Blackwell-class performance to every partner building on Arm — a milestone that reflects the incredible momentum we’re seeing in the data center.”

For his part, NVIDIA founder and CEO Jensen Huang said:

"NVLink Fusion is the connective fabric of the AI era — linking every CPU, GPU and accelerator into one unified rack-scale architecture. Together with Arm, we’re extending this vision across Neoverse to empower innovators everywhere to design the next generation of specialized AI infrastructure.”

Neoverse’s Expanding Footprint and the Power-Efficiency Imperative

With Neoverse deployments now approaching roughly 50% of all compute shipped into top hyperscalers in 2025 (representing more than a billion Arm cores) and with nation-scale AI campuses such as the Stargate project already anchored on Arm compute, the addition of NVLink Fusion becomes a pivotal extension of the Neoverse roadmap. Partners can now connect custom Arm CPUs to their preferred NVIDIA accelerators across a coherent, high-bandwidth, rack-scale fabric.

Arm characterized the shift as a generational inflection point in data-center architecture, noting that “power—not FLOPs—is the bottleneck,” and that future design priorities hinge on maximizing “intelligence per watt.”

Ian Buck, vice president and general manager of accelerated computing at NVIDIA, underscored the practical impact:

“Folks building their own Arm CPU, or using an Arm IP, can actually have access to NVLink Fusion—be able to connect that Arm CPU to an NVIDIA GPU or to the rest of the NVLink ecosystem—and that’s happening at the racks and scale-up infrastructure.”

Despite the expanded design flexibility, this is not being positioned as an open interconnect ecosystem. NVIDIA continues to control the NVLink Fusion fabric, and all connections ultimately run through NVIDIA’s architecture.

For data-center planners, the SC25 announcement translates into several concrete implications:

1.   NVIDIA “Grace-style” Racks Without Buying Grace

With NVLink Fusion now baked into Neoverse, hyperscalers and sovereign operators can design their own Arm-based control-plane or pre-processing CPUs that attach coherently to NVIDIA GPU domains—such as NVL72 racks or HGX B200/B300 systems—without relying on Grace CPUs.

A rack-level architecture might now resemble:

• Custom Neoverse SoC for ingest, orchestration, agent logic, and pre/post-processing

• NVLink Fusion fabric

• Blackwell GPU islands and/or NVLink-attached custom accelerators (Marvell, MediaTek, others)

This decouples CPU choice from NVIDIA’s GPU roadmap while retaining the full NVLink fabric. In practice, it also opens pathways for operators to slot in lower-cost or workload-specific accelerators for tasks that don’t require the full capabilities of Grace-Blackwell GPU complexes.

CHI C2C—an extension of Arm’s AMBA CHI protocol—underpins this flexibility by enabling coherent and secure communication across chiplets and multi-chip configurations.

2.  Rack-Scale Coherence as a Standard Feature

Because NVLink Fusion is coherent end-to-end and integrates directly with CHI C2C, CPU, GPU, and accelerator memory can now operate as a unified pool at rack scale. This generalizes the Grace-Hopper and Grace-Blackwell architecture to any Neoverse implementer.

The design strongly favors large-scale training environments that use heavy tensor or model parallelism within a single NVLink domain. CPUs and on-rack accelerators can now handle streaming, sharding, and I/O without routing traffic through PCIe or NICs for every exchange, reducing latency and smoothing utilization across the rack.

For facility planners, NVLink domains—NVL72 blocks, HGX nodes, and their successors—remain the fundamental unit of “inside-the-rack” scale-up. What changes now is the range of Arm CPU options that can live inside those domains, enabling more customized and power-efficient AI rack designs.

What Comes Next for Neoverse + NVLink Fusion

Neoverse licensees will now need to publicly signal their adoption plans for NVLink Fusion. The industry will be watching for AWS, Google, Microsoft, Oracle, Meta, national labs, and sovereign cloud programs to reference NVLink-enabled Arm CPUs in upcoming roadmaps, procurement cycles, or RFPs. Arm already has meaningful traction inside hyperscale data centers and emerging AI-factory designs; the open question is whether NVLink Fusion represents a step-change, or simply the next stage of an expected evolution.

Pricing also remains an unknown. Tight licensing terms could limit NVLink Fusion to the largest hyperscalers and sovereign operators. More permissive terms could enable second-tier cloud providers and colocation platforms to adopt off-the-shelf Neoverse+NVLink CPUs as part of standardized AI-factory rack designs.

Another complexity is NVIDIA’s own roadmap. The forthcoming NVIDIA Vera Superchips will use custom Arm cores rather than Neoverse V2, even as Neoverse V2 gains native NVLink Fusion support. If this pattern continues, NVIDIA could find itself both relying on Neoverse and competing with Neoverse inside the same coherent fabric. While this duality may initially appear confusing, it could accelerate the shift toward solution-specific CPU/GPU combinations and encourage operators to diversify CPU choices within NVLink domains.

7 Key Additional SC25 Highlights That Matter for Data Center Frontier

SC25 arrived at a moment when hyperscale AI factories are reshaping server design, cooling architectures, and power delivery. Beyond the headline Arm–NVIDIA announcement, several developments stood out for operators, developers, and AI-infrastructure planners.

1. NVIDIA’s Vera Rubicon and NVL144 Fabric Scaling

NVIDIA used SC25 to provide additional detail on the Vera accelerator roadmap, including NVL144 configurations optimized for trillion-parameter and mixture-of-experts workloads. Key takeaways for operators:

• Vera’s higher-density NVLink domains increase per-rack GPU counts by 30–40% over Blackwell-class racks.

• Memory bandwidth gains accelerate long-context inference, a rising cost center in enterprise AI.

• NVL144’s power envelope pushes facilities toward higher-amp rack design and multi-MW per-hall blocks.

For AI data centers, this confirms the transition toward “superclusters” of tightly coupled racks rather than isolated GPU islands.

2. Liquid Cooling Entering Standardization Phase

Across the show floor, OEMs and hyperscaler vendors converged on a common message: direct-to-chip liquid cooling is no longer an optional path but the baseline for Blackwell, Vera, and AMD Instinct MI400-series deployments.

Emerging themes:

• Reversible cold-plate loops for maintenance windows.

• Warm-water cooling at 40–50°C, enabling major reductions in chiller load.

• Integration with 800V DC busways, aligning with next-gen power distribution needs.

This matters to DCF readers because power and cooling designs for AI factories are now converging around unified standards that compress lead times—and reshape retrofit economics.

3. AMD’s MI400 Architecture and Open Accelerator Fabric

AMD released deeper architectural detail on MI400-series accelerators and enhanced ROCm roadmap, with the most actionable takeaway for operators being the continued maturation of open accelerator fabrics.

Although NVIDIA remains dominant, the MI400 fabric:

• Allows multi-vendor accelerator clusters for specialized workloads.

• Offers potential cost advantages for inference-heavy deployments.

• Aligns with hyperscaler “NPUs + GPUs” disaggregation strategies.

For colocation and second-tier cloud platforms, MI400 could become a preferred option in mixed-vendor AI pods.

4. HPE, Dell, Lenovo Announce Composable AI Racks

Major server OEMs announced new reference designs aimed directly at AI-factory builders, including:

• HPE Cray Rack-Integrated AI pods

• Dell’s modular GPU blocks with shared cold-plate manifolds

• Lenovo Neptune-enhanced systems using 60°C water

The new designs emphasized:

• Faster build-outs using pre-validated topologies

• Single-rack to multi-rack coherent designs

• Simplified liquid-cooling deployment at scale

For data-center developers, these reference architectures shorten the timeline between land acquisition and live AI capacity.

5. Networking: Ubiquiti Compute, UltraEthernet, and SONiC Expansion

SC25 reinforced that the future of AI networking is multi-layer:

• UltraEthernet continues to attract hyperscaler contributors, aiming to reduce congestion in multi-cluster training environments.

• SONiC-based fabrics are expanding into AI-fabric top-of-rack designs, especially for inference clusters.

• Ubiquiti Compute (new entrant) demonstrated reference designs for mid-scale AI fabrics targeting sovereign and enterprise AI deployments.

Networking is now emerging as a critical differentiator in cluster performance and build-out velocity, as important as GPUs and cooling.

6. Power & Cooling Infrastructure Vendors Shift to AI-First Models

Schneider Electric, Eaton, Vertiv, and Rittal all presented updated solutions built explicitly for:

• 60 kW/rack densities

• 800V DC distribution

• Rear-door + direct-to-chip hybrid cooling

• Integrated telemetry for model-aware power management

The message from vendors was clear: the power layer is being redesigned around AI-specific transient loads, load-balancing patterns, and energy-efficiency requirements.

7. HPC + AI Convergence Reaches Maturity

SC25 showed a near-complete collapse of the old HPC/AI divide:

• HPC centers are adopting AI fabrics for simulation-plus-inference workflows.

• AI training clusters are integrating HPC-grade schedulers and parallel filesystems.

• DOE and national labs presented new hybrid HPC+AI procurement models.

For DCF’s audience of developers and operators, this signals that AI campuses and exascale HPC sites will increasingly share design elements, supply chains, and deployment patterns.

At Data Center Frontier, we talk the industry talk and walk the industry walk. In that spirit, DCF Staff members may occasionally use AI tools to assist with content. Elements of this article were created with help from OpenAI's GPT5.

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